33 #ifndef ERRIEZ_DS1302_H_ 34 #define ERRIEZ_DS1302_H_ 40 #define DS1302_ACB 0x80 41 #define DS1302_ACB_RAM 0x40 42 #define DS1302_ACB_CLOCK 0x00 43 #define DS1302_ACB_READ 0x01 44 #define DS1302_ACB_WRITE 0x00 46 #define DS1302_CMD_READ_CLOCK_REG(reg) (DS1302_ACB | DS1302_ACB_CLOCK | (((reg) & 0x1F) << 1) | DS1302_ACB_READ) 48 #define DS1302_CMD_WRITE_CLOCK_REG(reg) (DS1302_ACB | DS1302_ACB_CLOCK | (((reg) & 0x1F) << 1) | DS1302_ACB_WRITE) 50 #define DS1302_CMD_READ_CLOCK_BURST (DS1302_ACB | DS1302_ACB_CLOCK | 0x3E | DS1302_ACB_READ) 52 #define DS1302_CMD_WRITE_CLOCK_BURST (DS1302_ACB | DS1302_ACB_CLOCK | 0x3E | DS1302_ACB_WRITE) 54 #define DS1302_CMD_READ_RAM(addr) (DS1302_ACB | DS1302_ACB_RAM | (((addr) & 0x1F) << 1) | DS1302_ACB_READ) 56 #define DS1302_CMD_WRITE_RAM(addr) (DS1302_ACB | DS1302_ACB_RAM | (((addr) & 0x1F) << 1) | DS1302_ACB_WRITE) 58 #define DS1302_CMD_READ_RAM_BURST (DS1302_ACB | DS1302_ACB_RAM | 0x3E | DS1302_ACB_READ) 60 #define DS1302_CMD_WRITE_RAM_BURST (DS1302_ACB | DS1302_ACB_RAM | 0x3E | DS1302_ACB_WRITE) 64 #define DS1302_REG_SECONDS 0x00 65 #define DS1302_REG_MINUTES 0x01 66 #define DS1302_REG_HOURS 0x02 67 #define DS1302_REG_DAY_MONTH 0x03 68 #define DS1302_REG_MONTH 0x04 69 #define DS1302_REG_DAY_WEEK 0x05 70 #define DS1302_REG_YEAR 0x06 71 #define DS1302_REG_WP 0x07 72 #define DS1302_REG_TC 0x08 74 #define DS1302_NUM_CLOCK_REGS 7 76 #define DS1302_NUM_RAM_REGS 31 79 #define DS1302_SEC_CH 7 80 #define DS1302_BIT_WP 7 81 #define DS1302_BIT_READ 0 83 #define DS1302_TCS_DISABLE 0x5C 86 #define DS1302_CLK_LOW() { *portOutputRegister(_clkPort) &= ~_clkBit; } 87 #define DS1302_CLK_HIGH() { *portOutputRegister(_clkPort) |= _clkBit; } 88 #define DS1302_CLK_INPUT() { *portModeRegister(_clkPort) &= ~_clkBit; } 89 #define DS1302_CLK_OUTPUT() { *portModeRegister(_clkPort) |= _clkBit; } 91 #define DS1302_IO_LOW() { *portOutputRegister(_ioPort) &= ~_ioBit; } 92 #define DS1302_IO_HIGH() { *portOutputRegister(_ioPort) |= _ioBit; } 93 #define DS1302_IO_INPUT() { *portModeRegister(_ioPort) &= ~_ioBit; } 94 #define DS1302_IO_OUTPUT() { *portModeRegister(_ioPort) |= _ioBit; } 95 #define DS1302_IO_READ() ( *portInputRegister(_ioPort) & _ioBit ) 97 #define DS1302_CE_LOW() { *portOutputRegister(_cePort) &= ~_ceBit; } 98 #define DS1302_CE_HIGH() { *portOutputRegister(_cePort) |= _ceBit; } 99 #define DS1302_CE_INPUT() { *portModeRegister(_cePort) &= ~_ceBit; } 100 #define DS1302_CE_OUTPUT() { *portModeRegister(_cePort) |= _ceBit; } 102 #define DS1302_CLK_LOW() { digitalWrite(_clkPin, LOW); } 103 #define DS1302_CLK_HIGH() { digitalWrite(_clkPin, HIGH); } 104 #define DS1302_CLK_INPUT() { pinMode(_clkPin, INPUT); } 105 #define DS1302_CLK_OUTPUT() { pinMode(_clkPin, OUTPUT); } 107 #define DS1302_IO_LOW() { digitalWrite(_ioPin, LOW); } 108 #define DS1302_IO_HIGH() { digitalWrite(_ioPin, HIGH); } 109 #define DS1302_IO_INPUT() { pinMode(_ioPin, INPUT); } 110 #define DS1302_IO_OUTPUT() { pinMode(_ioPin, OUTPUT); } 111 #define DS1302_IO_READ() ( digitalRead(_ioPin) ) 113 #define DS1302_CE_LOW() { digitalWrite(_cePin, LOW); } 114 #define DS1302_CE_HIGH() { digitalWrite(_cePin, HIGH); } 115 #define DS1302_CE_INPUT() { pinMode(_cePin, INPUT); } 116 #define DS1302_CE_OUTPUT() { pinMode(_cePin, OUTPUT); } 120 #if F_CPU >= 20000000UL 121 #define DS1302_PIN_DELAY() { delayMicroseconds(1); } 123 #define DS1302_PIN_DELAY() 132 ErriezDS1302(uint8_t clkPin, uint8_t ioPin, uint8_t cePin);
142 bool read(
struct tm *dt);
143 bool write(
const struct tm *dt);
144 bool setTime(uint8_t hour, uint8_t min, uint8_t sec);
145 bool getTime(uint8_t *hour, uint8_t *min, uint8_t *sec);
146 bool setDateTime(uint8_t hour, uint8_t min, uint8_t sec,
147 uint8_t mday, uint8_t mon, uint16_t year,
149 bool getDateTime(uint8_t *hour, uint8_t *min, uint8_t *sec,
150 uint8_t *mday, uint8_t *mon, uint16_t *year,
162 bool readBuffer(uint8_t reg,
void *buffer, uint8_t len);
163 bool writeBuffer(uint8_t reg,
void *buffer, uint8_t len);
187 void transferBegin();
189 void writeAddrCmd(uint8_t value);
190 void writeByte(uint8_t value);
194 #endif // ERRIEZ_DS1302_H_ void writeBufferRAM(uint8_t *buf, uint8_t len)
Write buffer to RAM address 0x00 (burst write)
void readBufferRAM(uint8_t *buf, uint8_t len)
Read buffer from RAM address 0x00 (burst read)
bool getTime(uint8_t *hour, uint8_t *min, uint8_t *sec)
Read time from RTC.
bool setEpoch(time_t t)
Write Unix epoch UTC time to RTC.
ErriezDS1302(uint8_t clkPin, uint8_t ioPin, uint8_t cePin)
Constructor DS1302 RTC.
bool isRunning()
Read RTC CH (Clock Halt) from seconds register.
bool clockEnable(bool enable=true)
Enable or disable oscillator.
time_t getEpoch()
Read Unix UTC epoch time_t.
uint8_t bcdToDec(uint8_t bcd)
BCD to decimal conversion.
uint8_t readRegister(uint8_t reg)
Read register.
bool setTime(uint8_t hour, uint8_t min, uint8_t sec)
Write time to RTC.
bool begin()
Initialize and detect DS1302 RTC.
uint8_t readByteRAM(uint8_t addr)
Read byte from RAM.
bool getDateTime(uint8_t *hour, uint8_t *min, uint8_t *sec, uint8_t *mday, uint8_t *mon, uint16_t *year, uint8_t *wday)
Get date time.
bool readBuffer(uint8_t reg, void *buffer, uint8_t len)
Read buffer from RTC clock registers.
bool writeBuffer(uint8_t reg, void *buffer, uint8_t len)
Write buffer to RTC clock registers.
bool setDateTime(uint8_t hour, uint8_t min, uint8_t sec, uint8_t mday, uint8_t mon, uint16_t year, uint8_t wday)
Set date time.
void writeByteRAM(uint8_t addr, uint8_t value)
Write a byte to RAM.
uint8_t decToBcd(uint8_t dec)
Decimal to BCD conversion.
bool write(const struct tm *dt)
Write date and time to RTC.
bool read(struct tm *dt)
Read date and time from RTC.
bool writeRegister(uint8_t reg, uint8_t value)
Write register.